Linear Integrated Circuits Study Notes

IC FABRICATION


IC classification – Fundamental of monolithic IC technology – Epitaxial growth – Masking and
etching, diffusion of impurities – Realisation of monolithic ICs and packaging –Fabrication of
diodes, capacitance, resistance and FETs.


Integrated Circuits


An integrated circuit (IC) is a miniature, low cost electronic circuit consisting of active and
passive components fabricated together on a single crystal of silicon. The active components are
transistors and diodes and passive components are resistors and capacitors.


Advantages of Integrated Circuits


Miniaturization and hence increased equipment density.
Cost reduction due to batch processing.
Increased system reliability due to the elimination of soldered joints.
Improved functional performance.
Matched devices.
Increased operating speeds.
Reduction in power consumption


Classification of Integrated Circuits


Integrated circuits can be classified into analog, digital and mixed signal (both analog and
digital on the same chip).

Based upon above requirement two different IC technology namely


Monolithic Technology and Hybrid Technology have been developed. In monolithic IC ,all circuit
components ,both active and passive elements and their interconnections are manufactured into or
on top of a single chip of silicon.

In hybrid circuits, separate component parts are attached to a ceramic substrate and interconnected by means of either metallization pattern or wire bounds.
Digital integrated circuits can contain anything from one to millions of logic gates, flipflops, multiplexers, and other circuits in a few square millimeters. The small size of these circuits
allows high speed, low power dissipation, and reduced manufacturing cost compared with boardlevel integration.

These digital ICs, typically microprocessors, DSPs, and micro controllers work
using binary mathematics to process “one” and “zero” signals.

Analog ICs, such as sensors, power management circuits, and operational amplifiers, work
by processing continuous signals. They perform functions like amplification, active filtering,
demodulation, mixing, etc.

Analog ICs ease the burden on circuit designers by having expertly designed analog circuits available instead of designing a difficult analog circuit from scratch.
ICs can also combine analog and digital circuits on a single chip to create functions such as A/D
converters and D/A converters. Such circuits offer smaller size and lower cost, but must carefully
account for signal interference.

Generations
SSI, MSI and LSI
The first integrated circuits contained only a few transistors. Called “Small-Scale Integration”
(SSI), digital circuits containing transistors numbering in the tens provided a few logic gates for
example, while early linear ICs such as the Plessey SL201 or the Philips TAA320 had as few as
two transistors. The term Large Scale Integration was first used by IBM scientist Rolf Landauer
when describing the theoretical concept, from there came the terms for SSI, MSI, VLSI, and ULSI.

They began to appear in consumer products at the turn of the decade, a typical application being
FM inter-carrier sound processing in television receivers.
The next step in the development of integrated circuits, taken in the late 1960s, introduced devices
which contained hundreds of transistors on each chip, called “Medium-Scale Integration” (MSI).
They were attractive economically because while they cost little more to produce than SSI devices,
they allowed more complex systems to be produced using smaller circuit boards, less assembly
work (because of fewer separate components), and a number of other advantages.


VLSI


The final step in the development process, starting in the 1980s and continuing through the
present, was “very large-scale integration” (VLSI). The development started with hundreds of
thousands of transistors in the early 1980s, and continues beyond several billion transistors as of
2007.
In 1986 the first one megabit RAM chips were introduced, which contained more than one million
transistors. Microprocessor chips passed the million transistor mark in 1989 and the billion
transistor mark in 2005


ULSI, WSI, SOC and 3D-IC


To reflect further growth of the complexity, the term ULSI that stands for “Ultra-Large Scale
Integration” was proposed for chips of complexity of more than 1 million transistors.
Wafer-scale integration (WSI) is a system of building very-large integrated circuits that uses an
entire silicon wafer to produce a single “super-chip”. Through a combination of large size and
reduced packaging, WSI could lead to dramatically reduced costs for some systems, notably
massively parallel supercomputers. The name is taken from the term Very-Large-Scale Integration,
the current state of the art when WSI was being developed.


System-on-a-Chip (SoC or SOC) is an integrated circuit in which all the components needed for a
computer or other system are included on a single chip. The design of such a device can be
complex and costly, and building disparate components on a single piece of silicon may
compromise the efficiency of some elements.


However, these drawbacks are offset by lower manufacturing and assembly costs and by a
greatly reduced power budget: because signals among the components are kept on-die, much less
power is require. Three Dimensional Integrated Circuit (3D-IC) has two or more layers of active
electronic components that are integrated both vertically and horizontally into a single circuit.

Communication between layers uses on-die signaling, so power consumption is much lower than
in equivalent separate circuits. Judicious use of short vertical wires can substantially reduce overall
wire length for faster operation.


Construction of a Monolithic Bipolar Transistor:
The fabrication of a monolithic transistor includes the following steps.

  1. Epitaxial growth
  2. Oxidation
  3. Photolithography
  4. Isolation diffusion
  5. Base diffusion
  6. Emitter diffusion
  7. Contact mask
  8. Aluminium metallization
  9. Passivation
    The letters P and N in the figures refer to type of doping, and a minus (-) or plus (+) with P and N
    indicates lighter or heavier doping respectively.
  10. Epitaxial growth:
    The first step in transistor fabrication is creation of the collector region. We normally
    require a low resistivity path for the collector current. This is due to the fact that, the collector
    contact is normally taken at the top, thus increasing the collector series resistance and the VCE(Sat)
    of the device.

The higher collector resistance is reduced by a process called buried layer as shown in figure. In
this arrangement, a heavily doped ‗N‘ region is sandwiched between the N-type epitaxial layer and
P – type substrate. This buried N+ layer provides a low resistance path in the active collector
region to the collector contact C. In effect, the buried layer provides a low resistance shunt path for
the flow of current.
For fabricating an NPN transistor, we begin with a P-type silicon substrate having a
resistivity of typically 1Ω-cm, corresponding to an acceptor ion concentration of 1.4 * 1015
atoms/cm3 . An oxide mask with the necessary pattern for buried layer diffusion is prepared. This
is followed by masking and etching the oxide in the buried layer mask.


The N-type buried layer is now diffused into the substrate. A slow-diffusing material such
as arsenic or antimony us used, so that the buried layer will stay-put during subsequent diffusions.
The junction depth is typically a few microns, with sheet resistivity of around 20Ω per square.
Then, an epitaxial layer of lightly doped N-silicon is grown on the P-type substrate by
placing the wafer in the furnace at 12000 C and introducing a gas containing phosphorus (donor
impurity). The resulting structure is shown in figure.


The subsequent diffusions are done in this epitaxial layer. All active and passive
components are formed on the thin N-layer epitaxial layer grown over the P-type substrate.
Obtaining an epitaxial layer of the proper thickness and doping with high crystal quality is perhaps
the most formidable challenge in bipolar device processing.


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